Stacked switchable element and diode combination

ABSTRACT

A device ( 10 ) comprises a semiconductor diode ( 12 ) and a switchable element ( 14 ) positioned in stacked adjacent relationship so that the semiconductor diode ( 12 ) and the switchable element ( 14 ) are electrically connected in series with one another. The switchable element ( 14 ) is switchable from a low-conductance state to a high-conductance state in response to the application of a forming voltage to the switchable element ( 14 ).

CONTRACTUAL ORIGIN OF THE INVENTION

[0001] The United States Government has rights in this inventionpursuant to Contract No. DE-AC36-99GO10337 between the U.S. Departmentof Energy and the Midwest Research Institute.

TECHNICAL FIELD

[0002] This invention relates to integrated circuit devices in generaland more specifically to a switchable element and diode combinationembodied in a stacked structure.

BACKGROUND ART

[0003] Semiconductor devices are well-known in the art and have beenused for decades in electronic systems to perform a wide variety oftasks. While many different types of semiconductor devices exist and arebeing used, most involve the transport of charge carriers (e.g.,electrons) across one or more junctions or interfaces formed within thesemiconductor material. The junctions typically involve an interfacebetween two different types of semiconductor material, such as p-typeand n-type material, although other types of semiconductor materials mayalso be used. In this manner, a wide range of semiconductor devices,such as diodes, transistors, and silicon controlled rectifiers, having awide range of functions and operating characteristics may be formed fromsemiconducting materials. Commonly used semiconductor materials include,but are not limited to, silicon, gallium arsenide, aluminum galliumarsenide, and gallium arsenide indium phosphide.

[0004] Because of the wide range of devices, functions, and operatingcharacteristics that may be created with such semiconducting materials,new devices and uses for semiconducting materials are still beingdeveloped, even today. Often, such newly developed devices prove to besignificant improvements over earlier devices, either in terms ofperformance, size, or some combination of the two. Unfortunately,however, such new devices often carry certain disadvantages, such asrequiring additional manufacturing steps, or requiring enhancedlithography or forming techniques. As a result, such newly developedsemiconductor devices often involve a balance between improvedperformance and increased difficulty of manufacture. Accordingly, anysemiconductor device having improved performance and/or reduced sizewhile at the same time involving simplified or reduced-costmanufacturing will represent a significant improvement in the state ofthe art.

DISCLOSURE OF INVENTION

[0005] A device according to the present invention may comprise asemiconductor diode and a is switchable element positioned in stackedadjacent relationship so that the semiconductor diode and the switchableelement are electrically connected in series with one another. Theswitchable element initially in a low-conductance or “OFF” state and maybe switched to a high-conductance or “ON” state in response to theapplication of a forming current to the switchable element.

[0006] Also disclosed is a method of forming a device that comprises thesteps of: Forming a diode device from semiconducting material; formingan intermediate layer in stacked adjacent relationship with the diodedevice; and depositing a metallic layer on the intermediate layer, theintermediate layer and the metallic layer forming a switchable elementthat is initially in a low-conductance or “OFF” state and that may beswitched to a high-conductance or “ON” state in response to theapplication of a forming current to the switchable element, theswitchable element being in electrical series with the diode device.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Illustrative and presently preferred embodiments of the inventionare shown in the accompanying drawings in which:

[0008]FIG. 1 is a schematic sectional view of a first embodiment of adevice according to the present invention;

[0009]FIG. 2 illustrates current density/voltage curves of an unformeddevice and a formed device; and

[0010]FIG. 3 is a schematic sectional view of a second embodiment of adevice according to the present invention.

BEST MODES FOR CARRYING OUT THE INVENTION

[0011] A device 10 according to one embodiment of the invention is shownin FIG. 1 and may comprise a semiconductor diode device 12 and aswitchable element 14 positioned in stacked adjacent relationship sothat the semiconductor diode 12 and switchable element 14 areelectrically connected in series. As will be described in greater detailbelow, the switchable element 14 is initially in the low-conductance or“OFF” state and may be switched to a high-conductance or “ON” state inresponse to the application of a forming current to the switchableelement 14. Stated another way, the forming current may be used to“close” (i.e., place in the high-conductance or ON state) the switchableelement 14. The series combination of the semiconductor diode 12 andswitchable element 14 allows the state (e.g., high- or low-conductance)of device 10 to be conveniently “written” and “sensed” or “read,”thereby allowing the device 10 to be used in electronic memory systems.

[0012] With reference now specifically to FIG. 1, one embodiment 10 ofthe device according to the present invention may comprise asemiconductor diode device 12 in contact with an electrical contact 16.As will be discussed in greater detail below, the diode device 12 maycomprise any of a wide range of structures and operating characteristicsfor semiconductor diodes that are now known in the art or that may bedeveloped in the future. By way of example, in the embodiment shown anddescribed in FIG. 1 the semiconductor diode device 12 may comprise ann⁺-i-p device having a highly doped n-type (i.e., n⁺) layer 18, anintrinsic or lightly doped layer 20, and a p-type (i.e., p) layer 22.All three layers 18, 20, and 22 may be fabricated from microcrystallinesilicon, although amorphous silicon may also be used. The contact 16 maycomprise stainless steel, although other materials may also be used, aswill be described in greater detail below.

[0013] The switchable element 14 may comprise a metal layer 24 and anintermediate layer 26 in positioned stacked adjacent relationship withthe diode device 12. The arrangement is such that the switchable element14 is electrically connected in series with the diode device 12. Statedanother way, the diode device 12 and switchable element 14 comprise amonolithic, series-connected stack. The metal layer 24 of switchableelement 14 may comprise silver, although other metals maybe used. Theintermediate layer 26 may comprise either an intrinsic semiconductinglayer, a p-type semiconducting layer, or some combination of intrinsicand p-type semiconducting material. Alternatively, the intermediatelayer 26 may comprise an insulator, such as a polymer material, as willbe described in greater detail below. In one preferred embodiment, theintermediate layer 26 comprises p-type amorphous silicon passivated withhydrogen (i.e., p-a-Si:H), although other materials may also be used. Aswill be described in greater detail below, it is generally preferred,but not required, that a stop layer 28 be formed or positioned betweenthe semiconductor diode device 12 and the switchable element 14. Thestop layer 28 helps to prevent the diode device 12 from being damaged(e.g., shorted) during the application of the forming current to theswitchable element 14. In one embodiment, the stop layer 28 may comprisea metallic or an extremely thin insulating layer. Alternatively, thestop layer 28 may comprise an appropriately doped and passivatedamorphous silicon material. Still other materials may also be used forthe stop layer 28, as will be described in greater detail below.

[0014] The diode portion 12, switchable element portion 14, and optionalstop layer 28 of device 10 may be fabricated in accordance with any of awide variety of processes that are well-known in the art or that may bedeveloped in the future that are or would be suitable for fabricatingthe various layers comprising each portion 12, 14, and 28. Consequently,the present invention should not be regarded as limited to anyparticular fabrication processes or techniques to fabricate the device10. However, by way of example, in one preferred embodiment, the variouslayers of the device may be fabricated by chemical vapor deposition(CVD), for example, hot-wire CVD or plasma-enhanced CVD.

[0015] As mentioned above, the switchable element 14 is initially in thelow-conductance or OFF state, but may be placed in the high-conductanceor ON state in response to the application to the switchable element 14of a forming current. Consequently, the switchable element 14 functionslike an “anti-fuse” in that it closes or becomes more conductive afterthe application of the forming current. This is in contrast to aconventional fuse which opens in response to the application to the fuseof an excessive current. When the switchable element 14 is in thelow-conductance or OFF state, the impedance of the switchable element isrelatively high (e.g., typically on the order of tens to hundreds ofmegaohms (MΩ) in one embodiment. When the switchable element is in thehigh-conductance or ON state, the impedance of the semiconductor switch14 is several orders of magnitude lower than the impedance of theswitchable element in the low-conductance state. For example, in onepreferred embodiment, the impedance of the switchable element 14 is onthe order of hundreds to thousands of ohms (Ω). As will be described ingreater detail below, the absolute impedance of the switchable element14 in either state is less important than is the magnitude of theimpedance difference between the two states. That is, the difference inthe impedances between the high- and low-conductance states should besufficient to allow for the reliable determination of the state of thedevice 10.

[0016] When the switchable element 14 is first formed or fabricated itis in the low-conductance or OFF state. That is, the switchable element14 has a relatively high impedance and passes very little current. Thestate of the switchable element 14 may be changed to thehigh-conductance or ON state by applying a forming current across theswitchable element 14. For example, in one preferred embodiment, theswitchable element 14 may be changed from the low-conductance or OFFstate to the high-conductance or ON state by applying a forming currentof sufficient magnitude and for sufficient time in the manner that willbe described below. While the mechanisms responsible for causing theswitchable element 14 to be switched from the low-conductance state tothe high-conductance state are not yet well-understood, it is believedthat the application of the forming current causes one or moreconductive filaments (shown schematically in FIG. 1 at 30) to form or“grow” from the metal layer 24 through the intermediate layer 26. Thefilament or filaments 30 provide a conductive pathway through theintermediate layer 26 of switchable element 14.

[0017] The filament growth theory is supported by observations that ifthe forming current and time of application are not carefullycontrolled, the diode element 12 will become shorted. It is believedthat such diode shorting is the result of continued filament growththrough the diode element 12. Accordingly, it is generally preferred,although not required, to provide the stop layer 28 between theswitchable element 14 and the diode element 12. The stop layer 28reduces the likelihood that the diode element 12 will become shortedduring the forming process.

[0018] The device 10 may be written to as follows. Assuming that thedevice 10 has been fabricated in the manner briefly described above, theswitchable element 14 will be in the low-conductance or OFF state. Thatis, the device 10 will act electrically in a manner akin to an opencircuit, with little current flowing in response to the application of apotential voltage across the series combination of the diode 12 andswitch 14. That is, the device 10 will have a current-voltagecharacteristic substantially as shown by curve 32 in FIG. 2. Of course,the device 10 may be utilized in this state, if desired. For example, ifthe device 10 comprises an individual cell or element of an electronicmemory array, the low-conductance state may be made to correspond to aselected binary state (e.g., 0 or 1), as the case may be.

[0019] If it is desired to change the state of the device 10, a formingcurrent can be applied across the series combination of the diode 12 andswitch element 14. The polarity of the forming current is such that thediode element 12 of device 10 is biased in the forward direction. Theapplication of the forming current causes the switchable element 14 ofthe device 10 to change to the high-conductance or ON state. In thehigh-conductance state, the device 10 will have a current-voltagecharacteristic substantially as shown by curve 34 in FIG. 2. The curve34 is similar to the electrical characteristics of the diode element 12,since the switchable element 14 is relatively conductive. Accordingly,the state of the device 10 can be detected or “read” by forward biasingthe diode element 12. If the diode element 12 conducts (i.e., passescurrent) then the switchable element 14 is in the high-conductance or ONstate. If the device 10 comprises an individual cell or element of anelectronic memory array, the high-conductance state may correspond tothe other binary state (e.g., a 1 or a 0).

[0020] A significant advantage of the device 10 according to the presentinvention is that it provides a series combination of an electronicswitch and diode in a stacked arrangement. Accordingly, the device 10 ofthe present invention eliminates the need to provide a lateralconduction path between the two devices, as would be required if the twodevices were fabricated in side-by-side (as opposed to the stacked)relationship. As a result, the device 10 would readily lend itself tothe simplified manufacture of high density memory arrays, since thelithography steps required to form a separate conductive path betweenthe diode and switch may be eliminated.

[0021] Having briefly described one embodiment 10 of a device accordingto the present invention, as well as some of its more significantfeatures and advantages, various preferred embodiments of the devicewill now be described in detail. However, before proceeding with thedetailed description it should be noted that while the device 10 isshown and described herein as it may be used in a semiconductor memoryarray to store binary (i.e., two state) data, it is not limited to usein such applications. Indeed, since the device of the present inventionis functionally similar to a switch and diode connected in series, thepresent invention may be used in any of a wide range of applicationswherein such functionality is desired. Accordingly, the device of thepresent invention should not be regarded as limited to the particularapplications shown and described herein.

[0022] With the foregoing considerations in mind, a first embodiment 10of a device according to the present invention is illustrated in FIG. 1and may comprise a semiconductor diode 12 and a switchable element 14positioned in stacked adjacent relationship so that the semiconductordiode 12 and switchable element 14 form a monolithic, series-connectedstack. The various elements (i.e., the semiconductor diode 12 andswitchable element 14) comprising device 10 may be fabricated to haveany of a wide range of configurations or shapes depending on therequirements of the particular application. Consequently, the presentinvention should not be regarded as limited to a device 10 comprisingany particular configuration or shape. However, by way of example, inone preferred embodiment, the device 10 is fabricated so that it has agenerally square shape or configuration, with each side of the squarehaving a length of about 10 micrometers (μm).

[0023] The semiconductor diode element 12 of the device 10 may compriseany of a wide range of diode types having any of a wide range ofstructures suitable for producing a diode device 12 having any of a widerange of electrical characteristics that would be required or desiredfor any particular application. For example, diode structures and typesthat may be used with the present invention include, but are not limitedto, diodes comprising n-i-p structures or p-i-n structures. diodestructures involving conventional n-p or p-n structures can also beused, provided such diodes are fabricated from crystalline silicon orother crystal materials. Moreover, the diodes may be of any of a widerange of types, such as, for example, “conventional” rectifying diodes,Schottky diodes, tunnel diodes, or even light emitting diodes.Consequently, the present invention should not be regarded as limited toany particular diode structure having any particular electricalcharacteristics. However, by way of example, in the embodiment shown anddescribed in FIG. 1, the semiconductor diode device 12 comprises ann⁺-i-p device having a highly doped n-type layer 18, an intrinsic (or avery lightly doped) layer 20, and a p-type layer 22. All three layers18, 20, and 22 are fabricated from microcrystalline silicon, althoughamorphous silicon may also be used.

[0024] The thicknesses of the various layers 18, 20, and 22 comprisingdiode device 12 are not particularly critical and may comprise any of awide range of thicknesses depending on the electrical characteristicsand other performance parameters that may be required or desired in anyparticular application. However, by way of example, in the embodimentshown and described herein, the n⁺ layer 18 may have a thickness ofabout 60 nano-meters (nm), whereas the thicknesses of the intrinsiclayer 20 and the p-layer 22 may be about 260 nm and 60 nm, respectively.

[0025] The layers 18, 20, and 22 comprising diode device 12 may beformed by any of a wide range of processes that are now known in the artor that may be developed in the future that are or would be suitable forforming the layers 18, 20, and 22 to produce the diode device 12.Accordingly, the present invention should not be regarded as limited toany particular process for forming the various layers of the diodedevice 12. However, by way of example, in one preferred embodiment, thevarious layers 18, 20, and 22 of diode device 12 are formed by chemicalvapor deposition.

[0026] The diode device 12 may be provided with a suitable electricalcontact, such as contact 16, to allow one of the electrodes (i.e.,either the anode or the cathode, as the case may be) of the diode device12 to be electrically connected to an external circuit and/or device. Inthe embodiment shown and described herein, the contact 16 contacts thecathode (i.e., n⁺ layer 18) of diode device 12. The contact 16 maycomprise any of a wide range of materials (e.g., metals or dopedsemiconductors) that would be suitable for the intended application.Also, any of a wide range of interface layers (e.g., dopedsemiconducting layers) may be positioned between the diode 12 and thecontact 16 if required or desired for the particular application.Consequently, the present invention should not be regarded as limited tocontacts comprising any particular material or to the presence orabsence of any interface layers or material between the diode 12 and thecontact 16. However, by way of example, in one preferred embodiment, thecontact 16 comprises stainless steel. Alternatively, other materials,such as aluminum, may also be used, as would be obvious to personshaving ordinary skill in the art after having become familiar with theteachings of the present invention.

[0027] As mentioned above, the particular process used to form the diodedevice 12, as well as the exact compositions and structuralcharacteristics of each of the various layers (e.g., 18, 20, and 22) ofthe diode device 12 are not particularly critical and may comprise anyof a wide range of forming processes, compositions and structuralcharacteristics that would be suitable for producing a diode devicehaving any of a wide range of desired electrical characteristics. Forexample, certain electrical characteristics of diode devices that aredependent on such fabrication parameters (e.g., the forming processes,layer compositions and structural characteristics) include, but are notlimited to forward turn-on voltage, forward series resistance, forwardbreakdown current, reverse breakdown voltage, reverse shunt resistance,and lateral resistance between elements. However, since the variousfabrication parameters of the layers comprising the diode devices may bevaried depending on the desired electrical characteristics of the diodedevice 12, and since persons having ordinary skill in the art couldreadily select such fabrication parameters after selecting the requiredor desired electrical characteristics of the diode device 12, thevarious fabrication parameters associated with the particular diodedevice 12 utilized in one preferred embodiment of the present inventionwill not be described in further detail herein.

[0028] The contact 16 may comprise the substrate itself which supportsthe device 10. Alternatively, the contact 16 may be supported by aseparate, preferably insulating, substrate 36, such as glass, ceramic,or plastic. See FIG. 1. Also, any of a wide range of interface layers(not shown) may be positioned between the contact 16 and the substrate36, as may be required or desired in the particular application. Forexample, in certain cases it may be desirable to provide an interfacelayer or material between the contact 16 and the substrate 36 to providefor improve adhesion of the contact 16 to the substrate 36. The use ofan insulating substrate 36 is advantageous if the device 10 comprises anindividual cell or element in an array of cells, such as may be providedfor in an electronic memory circuit. In such an application, aninsulating substrate 36 provides a means for electrically insulating acontact 16 associated with a single “row” or “column” of cells (i.e.,devices 10) from the contacts associated with adjacent rows or columnsof cells.

[0029] The switchable element 14 may comprise any of a wide range ofstructures that are well-known in the art or that may be developed inthe future capable of being switched between a nonconductive or “OFF”state and a conductive or “ON” state. For example, the switchableelement 14 may comprise any of the structures and devices disclosed inU.S. Pat. No. 4,684,972 issued on Aug. 4, 1987, and entitled“Non-Volatile Amorphous Semiconductor Memory Device Utilizing a FormingVoltage” and U.S. Pat. No. 5,360,981, issued Nov. 1, 1994, and entitled“Amorphous Silicon Memory”, both of which are hereby specificallyincorporated herein by reference for all that they disclose.

[0030] In the embodiment shown in FIG. 1, the switchable element 14 maycomprise a metal layer 24 and an intermediate layer 26 positioned instacked adjacent relationship. The switchable element 14 may bepositioned in stacked adjacent relationship with the diode device 12 sothat the diode device 12 and switchable element 14 are electricallyconnected in series. As was mentioned above, the mechanism or mechanismsby which the switchable element 14 may be switched between at least twostates (e.g., the ON state and the OFF state) are not well understood atthis time. However, it is believed that the application of the formingcurrent results in the formation or growth through the intermediatelayer 26 of one or more filaments (represented schematically in FIG. 1at 30) from the metal layer 24. This theory is supported by experimentalevidence which indicates that certain metals for the metal contact 24work better than others in causing the switchable element 14 to operatein either the conductive state or the non-conductive state. For example,Ag and V appear to diffuse easily through a semiconducting intermediatelayer 26 comprising hydrogenated (i.e., passivated) amorphous silicon(a-Si:H), whereas Cr appears to be less likely to diffuse through such asemiconducting intermediate layer 26. Consequently, it is generallypreferable to fabricate the metal layer 24 from either Ag or V,especially where the intermediate layer 26 comprises a-Si:H.

[0031] The thickness of the metal layer 24 is not particularly critical,but should be sufficient to provide the required mechanical strength anddurability that may be required or desired for the particularapplication. Consequently, the present invention should not be regardedas limited to a metal layer 24 having any particular thickness. However,by way of example, in one preferred embodiment, the metal layer 24 mayhave a thickness of about 60 nm. The metal layer 24 may be deposited byany of a wide variety of processes that are well-known in the art orthat may be developed in the future that would be suitable for formingsuch metallic layers. By way of example, in one preferred embodiment,the metal layer 24 is formed by evaporation, although other processes(e.g., sputter deposition) may also be used.

[0032] The intermediate layer 26 may be deposited directly on the diodedevice 12 and may comprise either a semiconducting material or aninsulating material. It will normally be best if the filament 30 growsthrough the layer 26 more readily than through the diode device 12.Alternatively, and as will be described in greater detail below asupplemental layer, such as a stop layer 28, may be formed between theintermediate layer 26 and the diode device 12. The intermediate layer 26may comprise any of a wide range of semiconducting materials, such asamorphous silicon passivated with hydrogen (a-Si:H) and may be eitherdoped or undoped. In the embodiment shown and described herein, theintermediate layer 26 comprises p-type passivated amorphous silicon.Alternatively, the intermediate layer 26 may comprise intrinsic a-Si:Hor even a p-i, p-i-n, or n-i-p structure of a-Si:H or ofmicrocrystalline silicon. In addition, other materials, such as thosedescribed in U.S. Pat. Nos. 4,684,972 and 5,360,981, may also be used.In still another application, the intermediate layer 26 may comprise aninsulating material (e.g., any of a wide range of polymers or otherorganic materials). Insulating materials that may be used include, butare not limited to alloys of hydrogen-passivated amorphous silicon withcarbon or with germanium. Alternatively, microcrystalline silicon mayalso be used. The intermediate layer may also be formed fromconventional photoresist films. The intermediate layer 26 may bedeposited by any of a wide variety of processes that are well-known inthe art or that may be developed in the future that would be suitablefor forming an intermediate layer 26 comprising the desired material. Byway of example, in one preferred embodiment, the semiconductingintermediate layer 26 is formed by chemical vapor deposition, althoughother processes may also be used.

[0033] The thickness of the intermediate layer 26 may be importantdepending on whether a supplemental layer, such as stop layer 28, ispositioned between the switchable element 14 and the semiconductor diodedevice 12. Generally speaking, the thickness of intermediate layer 26should be sufficient to prevent unintentional diffusion of the metallayer 24 through the intermediate layer 26. Such unintentional diffusionmay cause the switchable element 14 to change from the low-conductanceto the high-conductance state. However, the thickness of theintermediate layer 26 should not be so great that it is difficult tointentionally change the state of the switchable element 14 in responseto the forming current. In accordance with the foregoing considerations,we have found that a semiconducting intermediate layer 26 having athickness in the range of about 10 nm to about 500 nm (100 nm preferred)provides good results.

[0034] As was described above, it is generally preferred, but notrequired, to position a stop layer 28 between the intermediate layer 26of switchable element 14 and the diode 12. The stop layer 28 reduces thelikelihood that the diode device 12 will be shorted during theapplication of the forming current to the switchable element 14. Thatis, in accordance with the theory that the switchable element 14 is madeconductive due to the growth of one or more conductive filaments 30through the intermediate layer 26, the presence of the stop layer 28retards the growth of the filament 30 by an amount sufficient to allowthe forming current to be removed before the filament contacts or growsthrough the diode device 12. Alternatively, and as will be describedbelow, careful control of the forming current may allow the device 10 tobe operated satisfactorily in the absence of a supplemental or stoplayer 28. Certain variations in the materials and characteristicscomprising the switchable element 14 may also allow the device 10 to besatisfactorily operated without a supplemental or stop layer 28.

[0035] In one preferred embodiment the stop layer 28 comprises a highlydoped n-type semiconducting material, such as hydrogen passivatedamorphous silicon. Alternatively, other materials, such as metals orthin insulating layers (e.g., silicon oxide or silicon nitride), mayalso be used in the manner that will be described in greater detailbelow. The stop layer 28 may be deposited by any of a wide variety ofprocesses that are well-known in the art or that may be developed in thefuture that would be suitable for forming such semiconducting layers. Byway of example, in one preferred embodiment, the stop layer 28 is formedby chemical vapor deposition, although other processes may also be used.

[0036] If the stop layer 28 comprises an insulating or undopedsemiconducting material then the thickness of the stop layer should becarefully controlled. For example, thin stop layers 28 may reduce theability to reliably stop filament growth (e.g, by removing the formingcurrent) before the filament 30 shorts the diode device 12. On the otherhand, excessive thickness of an insulating stop layer 28 may impede theflow of current between the switchable element 14 and the diode 12,thereby making it difficult to read the state of the switch device 14.In this regard it is believed that the growth of the filament 30 shouldbe terminated at a position within an insulating stop layer 28 that willallow electrons to “tunnel” through the remaining thickness of the stoplayer 28. Such a phenomenon is known in the art as “electron tunneling.”In accordance with the foregoing considerations, then, we havedetermined that if the stop layer 28 comprises an insulator, it shouldhave a thickness between about 0.5 nm and about 2 nm (1 nm preferred).Alternatively, of course, other thicknesses may be used provided theyallow the switchable element 14 to be reliably written without shortingthe diode 12 while also allowing sufficient current flow through thejunction from the switchable element 14 and to determine whether theswitch device 12 is in the ON state or the OFF state.

[0037] As mentioned above, other materials may be used for the stoplayer 28. For example, the stop layer 28 may also comprise a relatively“stable” metal (i.e., a metal having low diffusivity through theadjacent layers 22 and 26) such as Cr. A stop layer 28 comprising ametallic material functions in a manner similar to the semiconductingstop layer in that it allows the filament growth to be more easilyterminated before the filament 30 contacts the diode device 12. Such ametallic stop layer may be fabricated in accordance with any of a widerange of processes that are now known in the art or that may bedeveloped in the future that are or would be suitable for depositingmetallic layers. Consequently, the present invention should not beregarded as limited to any particular fabrication process. However, byway of example, in one preferred embodiment, a metallic stop layer 28may be formed by evaporation. Alternatively, other processes, such assputter deposition, may also be used.

[0038] Because such a metallic stop layer 28 is highly electricallyconductive, it removes the concern of providing a low resistance path(such as by electron tunneling in the case of an insulating stop layer28) between the filament 30 and the diode device 12. Consequently, astop layer 28 fabricated from metal may be made thicker, if desired(compared with an insulating stop layer), in order to provide anenhanced margin against diode shorting by filament impingement. However,a metallic stop layer 28 would need to be patterned (e.g., by means oflithography) if the device 10 is to comprise an individual cell orelement of an array of devices 10. A patterned metallic stop layer 28 isrequired in such an application in order to prevent the metallic stoplayer 28 from shorting out other memory cells in the array. In contrast,a stop layer 28 comprising a semiconducting material, such as thinn+-a-Si:H or an insulating stop layer, such as SiN_(x), will not usuallyneed to be patterned in such an application. That is, the higherelectrical resistance of a semiconducting stop layer is usuallysufficient to prevent shorting and/or unacceptable cross-talk betweenadjacent memory cells. Accordingly, it is generally advantageous tofabricate the stop layer 28 from a semiconducting material (e.g.,n⁺-a-Si:H) or an insulating material if the device 10 is to be used inan electronic memory array.

[0039] When the device 10 is first formed or fabricated, the switchableelement 14 is in the low-conductance or OFF state and will have acurrent-voltage characteristic substantially as shown by curve 32 inFIG. 2. That is, the switchable element 14 has a relatively highimpedance and passes very little current, much like an open switch. Ifit is desired to change the state of the device 10, a forming currentcan be applied across the series combination of the diode 12 andswitchable element 14. The polarity of the forming current is such thatthe diode element 12 of device 10 is biased in the forward direction.The application of the forming current causes the switchable element 14to change to the high-conductance or ON state. In the ON state, thedevice 10 will have a current-voltage characteristic substantially asshown by curve 34 in FIG. 2. The curve 34 corresponding to thehigh-conductance or ON state of switchable element 14 is similar to theelectrical characteristics of the diode element 12 by itself.

[0040] The magnitude and duration of the forming current required tochange the state of the switchable element 14 may vary depending on theparticular materials used to form the device 10. Consequently, thepresent invention should not be regarded as limited to forming currentsof any particular magnitudes, voltages, and durations. However, by wayof example, in one preferred embodiment the forming current may have amagnitude in the range of about 0.1 micro-amperes (μA) to about 10 μA (1μA preferred). The forming current may be applied for durations in therange of about 1 nano-second (ns) to about 1 second, with faster timesbeing preferable. Alternatively, the forming processes may correspond tothose disclosed in U.S. Pat. Nos. 4,684,972 and 5,360,981 if theswitchable element 14 is fabricated in accordance with the teachingscontained therein.

[0041] External electronic circuitry (not shown) connected to the device10 can be made to recognize or differentiate between the changedcurrent-voltage characteristics (i.e., I-V curves 32 and 34) of thedevice 10, thus determine whether the switchable element 14 is in the ONor OFF state. For example, if the device 10 comprises one element in anarray of such elements, such as may be the case if the device 10comprises a portion of an electronic memory array, any element (e.g.,device 10) in the array may be “read” by forward biasing the diodedevice 12 associated with desired element while reverse biasing thediodes associated with the other elements in the array. If the elementconducts (i.e., passes current), then the element is in thehigh-conductance or ON state. This may be made to correspond to one ofthe states (e.g., “0” or “1”) in a binary system.

[0042] A second embodiment 110 of a device according to the presentinvention is illustrated in FIG. 3. The second embodiment 110 is similarto the first embodiment 10 described above except that the positions ofthe diode device 112 and the switchable element 114 are reversed. Thatis, the switchable element 114 is positioned adjacent a supportingsubstrate 136 with the diode device 112 in stacked adjacent relationshipwith the switchable element 112 so that the two devices form amonolithic, series-connected stack.

[0043] As was the case for the first embodiment 10, the diode device 112of the second embodiment 110 may comprise any of a wide range ofstructures and materials to provide any required or desired diodecharacteristic. For example, in the embodiment shown in FIG. 3, thediode device 112 comprises a p-i-n⁺ device having a p-type layer 122, anintrinsic layer 120, and a highly doped n-type layer 118. All threelayers 18, 20, and 22 are fabricated from microcrystalline silicon,although amorphous silicon may also be used. A contact 116 may be formedadjacent to the n⁺ layer 118.

[0044] The switchable element 114 may comprise any of the materialsrecited above for the switchable element 14 for the first embodiment 10and may be fabricated in accordance with the methods and considerationsdiscussed herein. For example, the switchable element 114 may comprise ametal layer 124 and an intermediate layer 126 positioned in stackedadjacent relationship. The metal layer 124 may be fabricated on thesupport substrate 136.

[0045] The device 110 may be provided with a stop layer 128 or the stoplayer 128 may be omitted if the formation of the filament 130 can bereliably controlled in the manner already described to avoid shortingthe diode element 112. If a stop layer 128 is used, it may compriseeither a semiconducting material (e.g., n⁺-a-Si:H), an insulatingmaterial, or a metallic material, whichever may be more advantageous forthe intended application.

[0046] It is contemplated that the inventive concepts herein describedmay be variously otherwise embodied and it is intended that the appendedclaims be construed to include alternative embodiments of the inventionexcept insofar as limited by the prior art.

1. A device comprising a semiconductor diode and a switchable elementpositioned in stacked adjacent relationship so that said semiconductordiode and said switchable element are electrically connected in serieswith one another, said switchable element being switchable from alow-conductance state to a high-conductance state in response to theapplication of a forming current.
 2. The device of claim 1, wherein saidswitchable element comprises an intermediate layer and a metallic layer,said intermediate layer being in stacked adjacent contact with saidmetallic layer.
 3. The device of claim 2, wherein said intermediatelayer comprises p-type amorphous silicon.
 4. The device of claim 2,wherein said intermediate layer comprises intrinsic-type amorphoussilicon.
 5. The device of claim 2, wherein said metallic layer is Ag,Cr, or V.
 6. The device of claim 1, further comprising a stop layerpositioned between said semiconductor diode and said switchable elementso that said semiconductor diode, said stop layer, and said switchableelement are in stacked adjacent contact with one another.
 7. The deviceof claim 6, wherein said stop layer comprises n-type amorphous silicon.8. The device of claim 6, wherein said stop layer comprises a metal. 9.The device of claim 8, wherein said metal stop layer is Cr.
 10. Thedevice of claim 1, further comprising a contact in adjacent contact withsaid semiconductor diode.
 11. The device of claim 10, wherein saidcontact comprises a metal.
 12. The device of claim 11, wherein saidmetal contact comprises stainless steel.
 13. The device of claim 1,wherein said semiconductor diode comprises an amorphous siliconstructure.
 14. The device of claim 1, wherein said semiconductor diodecomprises a microcrystalline silicon structure.
 15. A device comprising:a semiconductor diode device; a switchable element; and a stop layerpositioned between said semiconductor diode device and said switchableelement, the arrangement being such that said semiconductor diodedevice, said stop layer, and said switchable element are positioned instacked adjacent relationship, said switchable element being switchablefrom a low-conductance state to a high-conductance state in response tothe application of a forming current.
 16. The device of claim 15,wherein said switchable element comprises an intermediate layer and ametallic layer, said intermediate layer being in stacked adjacentcontact with said metallic layer.
 17. The device of claim 16, whereinsaid stop layer comprises n-type amorphous silicon.
 18. The device ofclaim 16, wherein said stop layer comprises a metal.
 19. The device ofclaim 18, wherein said metal stop layer is Cr.
 20. A method of forming adevice, comprising forming a diode device from semiconducting material;forming an intermediate layer in stacked adjacent relationship with saiddiode device; and depositing a metallic layer on said intermediatelayer, said intermediate layer and said metallic layer forming aswitchable element, said switchable element being switchable from alow-conductance state to a high-conductance state in response to theapplication of a forming voltage to said switchable element, saidswitchable element being in electrical series with said diode device.